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IDT74ALVCH162344 3.3V CMOS 1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: * 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * VCC = 2.5V 0.2V * CMOS power levels (0.4 W typ. static) * Rail-to-Rail output swing for increased noise margin * Available in SSOP, TSSOP, and TVSOP packages IDT74ALVCH162344 DESCRIPTION: This 1-bit to 4-bit address driver is built using advanced dual metal CMOS technology. The ALVCH162344 device is used in applications in which four separate memory locations must be addressed by a single address. The ALVCH162344 has series resistors in the device output structure which will significantly reduce line noise when used with light loads. This driver has been designed to drive 12mA at the designated threshold levels. The ALVCH162344 has "bus-hold" which retains the inputs' last state whenever the input goes to a high-impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. DRIVE FEATURES: * Balanced Output Drivers: 12mA * Low switching noise APPLICATIONS: * 3.3V high speed systems * 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM OE1 1 2 8 6 OE3 1B 1 36 5A 29 34 5B 1 1A 30 1B 4 41 5B 4 9 14 13 2B 1 42 6A 6B 1 2A 37 2B 4 6B 4 OE2 28 16 OE4 3B 1 43 7A 20 56 48 7B 1 3A 15 44 3B 4 23 21 27 7B 4 4B 1 8A 49 55 8B 1 4A 4B 4 51 8B 4 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 1 (c) 1999 Integrated Device Technology, Inc. MARCH 1999 DSC-4563/1 IDT74ALVCH162344 3.3V CMOS 1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION OE1 1B 1 1B 2 ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM(2) Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VI > VCC Continuous Clamp Current, VO < 0 Continuous Current through each VCC or GND Max -0.5 to +4.6 -0.5 to VCC+0.5 -65 to +150 -50 to +50 50 -50 100 Unit V V C mA mA mA mA 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 OE4 8B 1 8B 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 VTERM(3) TSTG IOUT IIK IOK ICC ISS GND 1B 3 1B 4 GND 8B 3 8B 4 VCC 1A 2B 1 2B 2 VCC 8A 7B 1 7B 2 GND 2B 3 2B 4 2A 3A 3B 1 3B 2 GND 7B 3 7B 4 7A 6A 6B 1 6B 2 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC. CAPACITANCE (TA = +25C, F = 1.0MHz) Symbol CIN COUT CI/O Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 5 7 7 Max. 7 9 9 Unit pF pF pF GND 3B 3 3B 4 4A GND 6B 3 6B 4 5A NOTE: 1. As applicable to the device type. VCC 4B 1 4B 2 VCC 5B 1 5B 2 PIN DESCRIPTION Pin Names OEx xA xBx Data Inputs(1) 3-State Outputs Description 3-State Output Enable Inputs (Active LOW) GND 4B 3 4B 4 GND 5B 3 5B 4 OE2 OE3 NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os. SSOP/ TSSOP/ TVSOP TOP VIEW FUNCTION TABLE(1) Inputs OEx L L H NOTE: 1. H = HIGH Voltage Level X = Don't Care L = LOW Voltage Level Z = High-Impedance Outputs xA L H X xBx L H Z 2 IDT74ALVCH162344 3.3V CMOS 1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C Symbol VIH Parameter Input HIGH Voltage Level VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VIL IIH IIL IOZH IOZL VIK VH ICCL ICCH ICCZ ICC Input LOW Voltage Level Input HIGH Current Input LOW Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC One input at VCC - 0.6V, other inputs at VCC or GND VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VCC = 3.6V VCC = 3.6V VI = VCC VI = GND VO = VCC VO = GND Test Conditions Min. 1.7 2 -- -- -- -- -- -- -- -- -- Typ.(1) -- -- -- -- -- -- -- -- -0.7 100 0.1 Max. -- -- 0.7 0.8 5 5 10 10 -1.2 -- 40 V mV A A A A V Unit V Quiescent Power Supply Current Variation -- -- 750 A NOTE: 1. Typical values are at VCC = 3.3V, +25C ambient. BUS-HOLD CHARACTERISTICS Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25C ambient. Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current VCC = 3V VCC = 2.3V VCC = 3.6V Test Conditions VI = 2V VI = 0.8V VI = 1.7V VI = 0.7V VI = 0 to 3.6V Min. - 75 75 - 45 45 -- Typ.(2) -- -- -- -- -- Max. -- -- -- -- 500 Unit A A A 3 IDT74ALVCH162344 3.3V CMOS 1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE OUTPUT DRIVE CHARACTERISTICS Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.7V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 4mA IOH = - 6mA IOH = - 4mA IOH = - 8mA IOH = - 6mA IOH = - 12mA IOL = 0.1mA IOL = 4mA IOL = 6mA IOL = 4mA IOL = 8mA IOL = 6mA IOL = 12mA Min. VCC - 0.2 1.9 1.7 2.2 2 2.4 2 -- -- -- -- -- -- -- Max. -- -- -- -- -- -- -- 0.2 0.4 0.55 0.4 0.6 0.55 0.8 V Unit V NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C. OPERATING CHARACTERISTICS, TA = 25C VCC = 2.5V 0.2V Symbol CPD CPD Parameter Power Dissipation Capacitance Outputs enabled Power Dissipation Capacitance Outputs disabled Test Conditions CL = 0pF, f = 10Mhz Typical 68 12 VCC = 3.3V 0.3V Typical 82 14 Unit pF SWITCHING CHARACTERISTICS(1) VCC = 2.5V 0.2V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(O) tSK(b) Parameter Propagation Delay xA to xBx Output Enable Time OE to xBx Output Disable Time OE to xBx Output Skew(2) Output Skew(2) -- -- -- -- -- -- -- -- -- -- 500 350 ps ps 1 5.4 -- 4.7 1.2 4.5 ns 1 6.4 -- 6.6 1.2 5.7 ns Min. 1 Max. 4.9 -- VCC = 2.7V Min. Max. 5.1 VCC = 3.3V 0.3V Min. 1.4 Max. 4.4 Unit ns NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2. Skew between any two outputs of the same package and switching in the same direction. For tSK(O), OUTPUT1 and OUTPUT2 are any two outputs. For tSK(b), OUTPUT1 and OUTPUT2 are in the same bank of the same package; this parameter is guaranteed but not production tested. 4 IDT74ALVCH162344 3.3V CMOS 1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE VIH VT 0V VOH VT VOL VIH VT 0V ALVC Link TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS Symbol VLOAD VIH VT VLZ VHZ CL VCC(1)= 3.3V0.3V VCC(1)= 2.7V 6 2.7 1.5 300 300 50 VCC 500 Pulse Generator (1, 2) SAME PHASE INPUT TRANSITION VCC(2)= 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30 Unit V V V mV mV pF VLOAD Open GND tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 6 2.7 1.5 300 300 50 tPHL Propagation Delay ENABLE CONTROL INPUT tPZL OUTPUT SW ITCH NORMALLY CLOSED LOW tPZH OUTPUT SW ITCH NORMALLY OPEN HIGH VLOAD/2 VT tPHZ VT 0V tPLZ DISABLE VIH VT 0V VLOAD/2 VLZ VOL VOH VHZ 0V ALVC Link VIN D.U.T. VOUT RT 500 CL ALVC Link Test Circuit for All Outputs DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2ns; tR 2ns. Enable and Disable Times NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. VIH DATA VT INPUT 0V tSU tH VIH TIMING VT INPUT 0V tREM VIH ASYNCHRONOUS VT CONTROL 0V VIH SYNCHRONOUS VT CONTROL tSU 0V tH ALVC Link SWITCH POSITION Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open VIH INPUT VT 0V VOH OUTPUT 1 VT VOL VOH OUTPUT 2 tPLH2 tPHL2 ALVC Link Set-up, Hold, and Release Times tPLH1 tPHL1 LOW-HIGH-LOW PULSE tW HIGH-LOW -HIGH PULSE VT tSK (x) tSK (x) VT VOL VT ALVC Link Pulse Width tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1 Output Skew - tSK(X) NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank. 5 IDT74ALVCH162344 3.3V CMOS 1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION ID T XX ALV C X XX Fam ily XX X D evice Type XX Package Tem p. R ange Bus-Hold PV PA PF 344 162 Shrink Sm all Outline P ackage Thin Shrink Sm all Outline P ackage Thin Very Sm all Outline P ackage 1-B it to 4-B it Address D river w ith 3-S tate Outputs D ouble-Density with Resistors, 12m A H 74 Bus-Hold -40C to +85C CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com for Tech Support: logichelp@idt.com (408) 654-6459 6 |
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